A prior art disk drive 10, see FIG. 1, typically includes a main integrated circuit, which is typically called a system on a chip (SOC) 11 that contains many of the electronics and firmware for the drive including the read/write channel system 31. Each disk (not shown) can have thin film magnetic material on each of the planar surfaces. Each disk surface normally has a dedicated pair of read and write heads packaged in a slider 13 that also includes fly-height control components. The sliders are mechanically mounted on an actuator (not shown) with various flexible components to allow appropriate degrees of movement during operation. Each slider is a sub-component of a head gimbal assembly (HGA) that typically includes a suspension assembly with a laminated flexure with copper traces to carry the electrical signals to and from the heads. The read and write heads (sensors) heads and associated connections are conventionally formed using thin film lithographic patterning in which a series of thin films deposited and patterned on the trailing surface slider.
The sliders are selectively positioned over tracks on the rotating disk by the actuator (not shown). The actuator also supports the electrical connections to the slider components and contain the arm electronics (AE) chip 12 which typically include preamplifiers (preamps) for the read heads, write drivers and fly-height controls. The number of signal lines that can be connected between the Channel 31 and AE 12 is relatively small because of the space limitations; therefore, improvements that do not require additional signal lines are preferred.
Unless otherwise noted, the term actuator will be used herein to include all of the mechanical and electrical components that are required for the sliders to function. A flex cable (not shown) connects the SOC 11 to the AE 12. The AE typically include digital and analog circuitry that control the signals sent to components in the slider and processes the signals received from the slider components. The write driver preamp 18 generates an analog current signal that is applied to the inductive coil in the write head 15 to write data by selectively magnetizing portions of the magnetic material on the surface of the rotating disk and creating magnetic transitions. An adjacent pair of magnetic transitions is generally called a dibit.
Current-mode logic (CML) is a digital input/output (I/O) interfacing logic scheme typically used between the channel and the write driver preamp. CML is a differential logic family that is used to transmit serial data to the write driver preamp to produce the pre-programmed wave shape at the write driver's output. The write driver's signal is then applied to the write transducer that writes the data to the disk media.
The control of the shape and amplitude of the current signal that is applied to the inductive coil in the write head 15 by the write driver preamp 18 is critical for optimizing the recording performance. Conventionally disk drives use write current overshoot amplitude (OSA) control to ensure that the write current reaches a peak value before the next magnetic transition. Write pre-compensation circuits are also used to compensate for non-linear bit shift caused by closely spaced transitions. An efficient magnetic field is particularly important when writing a relatively long magnetic section (called a long magnet) on a data track. A long magnet is an area of a track that is magnetized in one direction with a relatively long spacing between transitions.
U.S. Pat. No. 6,826,003 to Subrahmanyam (Nov. 30, 2004) describes a disk drive with a pattern dependent overshoot circuit for controlling write current overshoot. Predetermined patterns in the write data cause adjustments to the write current overshoot amplitude (OSA).
Disk storage areal densities continue to increase, which results in narrower data track pitches. Portions of previously written adjacent tracks can degrade as repeated writes to the same track can create interference/erasure on the adjacent tracks. FIG. 2 illustrates the adjacent tracks erasure problem for repeatedly written tracks on disk 20. The adjacent tracks next to the track where write head pole 21 is positioned are subject to erasure from the field that extends beyond the width of the target track. In addition the shields in the slider can also cause stray magnetic fields which place nearby tracks at risk of being inadvertently erased. The read head sensor is positioned between two shields 22. These shields 22 can also result in erasure at track positions that are relatively far from the track where the write head pole 21 is positioned. Similarly the write-around shield (WAS) can cause erasure at track positions other than the immediately adjacent track.
Test measurements have shown that adjacent and nearby by track erasure varies with the write data's frequency and/or pattern. Embodiments of the present invention address the problem of track erasure dependence on written data frequency and/or pattern. A timing circuit has been described in the prior art to address the problem of track erasure in a similar application, but in that case the peak current for a particular magnetic transition could only be adjusted depending on the previous bits (i.e., a look-back algorithm). However, this look-back strategy cannot be used to, for example, adjust the overshoot current of the first transition within a dibit or the first transition preceding a long magnet, both of which have historically been problematic.